Post-Doctoral Researcher |
|
D6-002, UPC Campus Nord |
Abhijit Das
Research Interests
Chip and package-scale networks
Memory hierarchy
Deep Neural Network (DNN) accelerators
Team
Current
Mohammad Nasser (PhD, 2024-2027).
Mariam Musavi (PhD, 2023-2026).
Emmanuel Irabor (MSc, Spring ‘24).
Stefano Petrilli (MSc, Spring ‘24).
Alumni
Mehdi Hassanpour (MSc, Fall ‘23).
Nitish Arya (MSc, Spring ‘23). First Employment: Research Engineer at Barcelona Supercomputing Center (BSC), Spain.
Publications
Dissertation
[PhD Thesis | PDF | DOI | Best PhD Thesis Award]
Designing Data-Aware Network-on-Chip for Performance
Abhijit Das
Indian Institute of Technology (IIT) Guwahati, Assam, India, October 2021
Book Chapter
[NoC S&P 2021 | DOI]
Trojan-Aware Network-on-Chip Routing
Manju R., Abhijit Das, John Jose and Prabhat Mishra
Network-on-Chip Security and Privacy, Springer 2021
Journal
[IEEE TC 2024 | PDF | DOI | Code]
Multi-Objective Hardware-Mapping Co-Optimisation for Multi-DNN Workloads on Chiplet-based Accelerators
Abhijit Das, Enrico Russo and Maurizio Palesi
IEEE Transactions on Computers, Vol: XX, No: XX, 2024
[IEEE CEM 2022 | PDF | DOI]
Revising NoC in Future Multi-Core based Consumer Electronics for Performance
Abhijit Das, Abhishek Kumar, John Jose and Maurizio Palesi
IEEE Consumer Electronics Magazine, Vol: 11, No: 3, 2022
[IEEE TVLSI 2021 | PDF | DOI]
Data Criticality in Multi-Threaded Applications: An Insight for Many-Core Systems
Abhijit Das, John Jose and Prabhat Mishra
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol: 29, No: 9, 2021
[IEEE TC 2021 | PDF | DOI]
Opportunistic Caching in NoC: Exploring Ways to Reduce Miss Penalty
Abhijit Das, Abhishek Kumar, John Jose and Maurizio Palesi
IEEE Transactions on Computers, Vol: 70, No: 6, 2021
Conferences
[ISVLSI 2022 | PDF | DOI | Best Student Paper Award]
Designing Data-Aware Network-on-Chip for Performance
Abhijit Das and John Jose
21st IEEE Computer Society Annual Symposium on VLSI, Paphos, Cyprus, July 2022
[ISVLSI 2022 | PDF | DOI]
LOKI: A Hardware Trojan Affecting Multiple Components of an SoC
Manju R., Abhijit Das and John Jose
21st IEEE Computer Society Annual Symposium on VLSI, Paphos, Cyprus, July 2022
[ICCD 2020 | PDF | DOI | Video]
Reducing Off-Chip Miss Penalty by Exploiting Underutilised On-Chip Router Buffers
Abhijit Das, Abhishek Kumar and John Jose
38th IEEE International Conference on Computer Design, Connecticut, USA, October 2020
[NOCS 2020 | PDF | DOI | Video]
SECTAR: Secure NoC using Trojan Aware Routing
Manju R., Abhijit Das, John Jose and Prabhat Mishra
14th IEEE/ACM International Symposium on Networks-on-Chip, Hamburg, Germany, September 2020
[ISVLSI 2020 | PDF | DOI | Video | Best Paper Candidate]
Exploiting On-Chip Routers to Store Dirty Cache Blocks in Tiled Chip Multi-Processors
Abhijit Das, Abhishek Kumar, John Jose and Maurizio Palesi
19th IEEE Computer Society Annual Symposium on VLSI, Limassol, Cyprus, July 2020
[NOCS 2018 | PDF | DOI]
Critical Packet Prioritisation by Slack-Aware Re-routing in On-Chip Networks
Abhijit Das, Sarath Babu, John Jose, Sangeetha Jose and Maurizio Palesi
12th IEEE/ACM International Symposium on Networks-on-Chip, Torino, Italy, October 2018
[VLSID 2018 | PDF | DOI]
An Adaptive Deflection Router with Dual Injection and Ejection Units for Mesh NoCs
John Jose and Abhijit Das
31st IEEE International Conference on VLSI Design, Pune, India, January 2018
[VLSI-SoC 2017 | PDF | DOI]
Implementation and Analysis of Hotspot Mitigation in Mesh NoCs by Cost-Effective Deflection Routing Technique
Reshma Raj R. S., Abhijit Das and John Jose
25th IFIP/IEEE International Conference on Very Large Scale Integration, Abu Dhabi, UAE, October 2017
[VDAT 2017 | PDF | DOI]
Adaptive Packet Throttling Technique for Congestion Management in Mesh NoCs
Aswathy N. S., Reshma Raj R. S., Abhijit Das, John Jose and Josna V. R.
21st International Symposium on VLSI Design and Test, Roorkee, India, June 2017
Workshops
[WACI@ASPLOS 2024 | PDF | DOI | Video]
Apparate: Evading Memory Hierarchy with GodSpeed Wireless-on-Chip
Nitesh Narayana G. S. and Abhijit Das
The Wild and Crazy Ideas Session at
29th ACM International Conference on Arch. Support for Prog. Languages and Oper. Systems, San Diego, USA, April 2024
[ADOPT@IPDPS 2023 | PDF | DOI]
Wireless enabled Inter-Chiplet Communication in DNN Hardware Accelerators
Maurizio Palesi, Enrico Russo, Abhijit Das and John Jose
2nd International Workshop on AI for Datacenter Optimization at
37th IEEE International Parallel and Distributed Processing Symposium, Florida, USA, May 2023
[NoCArc@MICRO 2022 | PDF | DOI]
WiBS: A Modular and Scalable Wireless Infrastructure in a Cycle-Accurate NoC Simulator
Manjari Saha, Abhijit Das and John Jose
15th International Workshop on Network on Chip Architectures at
55th IEEE/ACM International Symposium on Microarchitecture, Chicago, USA, October 2022
Others
[DAC 2021 | PhD Forum | Video]
Designing Data-Aware Network-on-Chip for Performance
Abhijit Das
58th ACM/IEEE Design Automation Conference, San Francisco, USA, December 2021
[IRISS 2019 | ACM India Annual Event]
Critical Packet Prioritisation by Slack-Aware Re-routing in On-Chip Networks
Abhijit Das
13th Inter-Research-Institute Student Seminar in Computer Science, Kochi, India, February 2019
[VLSI-SoC 2018 | PhD Forum | 3rd Best Poster Award]
Optimising NoC in Many-Core Systems
Abhijit Das
26th IFIP/IEEE International Conference on Very Large Scale Integration, Verona, Italy, October 2018
[RC 2018 | Poster | Best Poster Award]
An Adaptive Deflection Router with Dual Injection and Ejection Units for Mesh NoCs
Abhijit Das, Dipika Deb and John Jose
4th Research Conclave, Indian Institute of Technology (IIT) Guwahati, Assam, India, March 2018
[VLSID 2018 | PhD Forum]
Adaptive NoC Routers for Congestion Management
Abhijit Das
31st IEEE International Conference on VLSI Design, Pune, India, January 2018